1. Field of the Invention
The present invention relates to a layout structure of a photoelectric conversion device that outputs an output voltage based on incident light.
2. Background Art
Photoelectric conversion devices are currently used as image reading devices of facsimile machines, image scanners, digital copiers, X-ray imagers, and the like. Photoelectric conversion devices are manufactured using single-crystal silicon chips, and contact image sensors (CIS) are well known.
A photoelectric conversion device is described below.
FIG. 7 is a circuit diagram showing a photoelectric conversion unit. A photoelectric conversion unit 30 includes a photodiode 1, a reset switch 2, a buffer amplifier 3, a switch 14, a switch 15, a capacitor 12, a capacitor 13, a switch 16, and a switch 17.
The reset switch 2 and the buffer amplifier 3 are connected to an output terminal of the photodiode 1. The capacitor 12 is connected to an output terminal of the buffer amplifier 3 via the switch 14, and connected to an optical signal common output line 10 via the switch 16. The capacitor 13 is connected to the output terminal of the buffer amplifier 3 via the switch 15, and connected to an initial voltage common output line 11 via the switch 17.
The photodiode 1 generates a photocharge based on incident light, and outputs an optical signal based on the photocharge. The reset switch 2 resets a voltage of the output terminal of the photodiode 1 to a predetermined initial voltage. The buffer amplifier 3 amplifies the optical signal to output the amplified optical signal, and amplifies the initial voltage to output the amplified initial voltage. The capacitor 12 holds the amplified optical signal via the switch 14 controlled by a signal ΦSI, and outputs the amplified optical signal to the optical signal common output line 10 via the switch 16 controlled by a signal ΦSCH. The capacitor 13 holds the amplified initial voltage via the switch 15 controlled by the signal ΦRI, and outputs the amplified initial voltage to the initial voltage common output line 11 via the switch 17 controlled by the signal ΦSCH.
Here, due to the wiring layout, a parasitic capacitance 25 is generated between a control signal line 21 to which the signal ΦSCH is input and the optical signal common output line 10, and a parasitic capacitance 26 is generated between the control signal line 21 and the initial voltage common output line 11.
FIG. 8 is a circuit diagram showing an upstream part of the photoelectric conversion device. The upstream part of the photoelectric conversion device includes a plurality of photoelectric conversion units 30, the optical signal common output line 10, the initial voltage common output line 11, and a capacitor group 20.
The optical signal common output line 10 is commonly connected to all photoelectric conversion units 30, and has a first parasitic capacitance 31 which is the total sum of the parasitic capacitances 25 of all photoelectric conversion units 30. The initial voltage common output line 11 is commonly connected to all photoelectric conversion units 30, and has a second parasitic capacitance 32 which is the total sum of the parasitic capacitances 26 of all photoelectric conversion units 30. The capacitor group 20 is connected to the optical signal common output line 10 or the initial voltage common output line 11 via a metal wiring line 20z. 
FIG. 9 is a circuit diagram showing an example of the capacitor group 20 in FIG. 8. The capacitor group 20 includes a plurality of capacitors 20a. The capacitance value of the capacitor group 20 is determined by whether or not a metal wiring line 20b corresponding to each capacitor 20a is present. The effects of the parasitic capacitances of the optical signal common output line 10 and the initial voltage common output line 11 can be eliminated by setting the capacitance value of the capacitor group 20 to the capacitance value difference between the first parasitic capacitance 31 and the second parasitic capacitance 32.
FIG. 10 is a circuit diagram showing a downstream part of the photoelectric conversion device. The downstream part of the photoelectric conversion device includes a buffer amplifier 22, a buffer amplifier 23, a subtraction amplifier 24, a clamp circuit 27, a sample and hold circuit 28, and a transmission gate 29.
The optical signal common output line 10 is connected to the subtraction amplifier 24 via the buffer amplifier 22. The initial voltage common output line 11 is connected to the subtraction amplifier 24 via the buffer amplifier 23. An output terminal of the subtraction amplifier 24 is connected to the clamp circuit 27. An output terminal of the clamp circuit 27 is connected to the sample and hold circuit 28. An output terminal of the sample and hold circuit 28 is connected to the transmission gate 29. It is therefore important to eliminate the effects of the parasitic capacitances on the signals before being amplified by the buffer amplifiers 22 and 23, for improved output signal accuracy (for example, see Patent Document 1).
[Patent Document 1] Japanese Patent Application Laid-Open No. 2008-211591